{"id":44,"date":"2012-03-28T10:18:45","date_gmt":"2012-03-28T14:18:45","guid":{"rendered":"https:\/\/coefs.charlotte.edu\/amukherj\/?page_id=44"},"modified":"2026-03-11T13:58:23","modified_gmt":"2026-03-11T17:58:23","slug":"ecgr-60908090-embedded-chip-multi-processing","status":"publish","type":"page","link":"https:\/\/coefs.charlotte.edu\/amukherj\/teaching\/ecgr-60908090-embedded-chip-multi-processing\/","title":{"rendered":"ECGR 6090\/8090 Embedded Chip Multi-Processing"},"content":{"rendered":"\n

Embedded Chip Multi-Processing<\/span><\/strong><\/h2>\n\n\n\n

ECGR 6090\/8090 – M01<\/span><\/h2>\n\n\n\n

Spring 2010<\/span><\/h3>\n\n\n
\"circult<\/figure>\n\n\n

Lecture Timings<\/span><\/strong>          3:30pm – 4:45pm Monday, Wednesday      <\/span><\/h2>\n\n\n\n

Room <\/span> <\/strong>   <\/strong><\/span>                      Woodward 140<\/span><\/h2>\n\n\n\n

Office Hours <\/span><\/strong>                Wednesday 2:30 pm – 3:30 pm @ Woodward 235B<\/span><\/h2>\n\n\n\n

Instructor <\/span>  <\/strong>                   Dr. Ari Mukherjee<\/span><\/h2>\n\n\n\n

Course Objectives<\/span><\/strong><\/h2>\n\n\n\n

     Embedded systems are ubiquitous, and so are embedded processors with ever-increasing demands on high performance and low power operation. This has led to the emergence of increasingly powerful embedded chip multi-processors (ECMPs). The primary goal of this course is to introduce potential users of such ECMPs – students in widely varying disciplines and application areas – to the underlying hardware which is responsible for computation, power dissipation and meeting critical real-time constraints. Participants will gain a clearer understanding of the key architectural features of ECMPs which directly affect the performance of the embedded systems they work with, and gain insight about concepts and techniques necessary to design and select its hardware and software components. This is a very practical, results-oriented course that will provide knowledge and skills which can be applied immediately.<\/p>\n\n\n\n

Course Description<\/span><\/strong><\/h2>\n\n\n\n

     Students will design and analyze industrial strength ECMPs using a cycle-accurate ECMP simulator CASPER (developed at UNCC in collaboration with Sun Microsystems), which targets the SPARCV9 instruction set. The simulator explores a large ECMP design space over a wide range of scalable architectural components. These components have been pre-characterized extensively to derive their delay, area and power libraries for the 45nm technology. As a result, any ECMP designed by the students as part of their final course project can be fabricated (although it is not part of this course). More importantly, students will be introduced to a suite of design automation algorithms and tools for analysis of the processor architectures in conjunction with scheduling techniques, and for studying their power-performance metrics. The course will begin with basic concepts in embedding processing and real-time operating systems, and gradually progress to complex issues in ECMPs. Three specific application domains – Intelligent Energy Systems, Mobile and Network Processing, and Wireless Sensor Networks – have been initially identified as potential application areas. The courses discusses in detail the architectural and power-performance trade-offs faced by hardware and software designers, along with power management techniques in ECMPs. The entire course is project and lab based.<\/p>\n\n\n\n

Prerequisites<\/span>  <\/span><\/strong>None.<\/span><\/h2>\n\n\n\n

Textbook<\/span><\/strong>     <\/h2>\n\n\n\n

None required. References will be provided in class.<\/p>\n\n\n\n

Grading<\/span><\/strong><\/h2>\n\n\n\n

Lab Assignments \u2013 50 %, Final Project \u2013 40%, Report \u2013 10 %<\/p>\n\n\n\n

Course Topics<\/strong> (Subject to change)<\/p>\n\n\n\n

                                       1. Embedded System Basics
\n                                                            Standards
\n                                                            Embedded Computer Systems Overview
\n                                        2. Embedded Processors
\n                                                            Processor Architectures
\n                                                            Memory
\n                                                            Embedded Systems I\/O
\n                                                            Buses
\n                                                            Commercial Processors (PowerPC, MIPS, ARM, IBM Kilocore, CBE)
\n                                        3. Real Time Operating Systems Basics
\n                                                            Real Time Operating System (RTOS): Definitions and Issues
\n                                                            Task States and Task Scheduling
\n                                                            Survey of Task Schedulers
\n                                                            Introduction to Inter-task Communication and Synchronization
\n                                                             Message Passing from Task to Task
\n                                                             Semaphores and Shared Data
\n                                                             Liveness Issues: Deadlock, Lockout, Starvation
\n                                     4. Real-time Scheduling
\n                                                             Partitioning of Software into Tasks
\n                                                             Rate Monotonic, Earliest Deadline First and other Scheduling Techniques
\n                                                             Low Power Real-Time Scheduling
\n                                     5. ECMP Applications (list will be expanded)
\n                                                            Intelligent Energy Systems
\n                                                            Mobile and Network Processing
\n                                                            Wireless Sensor Networks
\n                                     6. Designing ECMPs
\n                                                            Core Selection – Heterogeneous Multi-cores
\n                                                            Memory Organization – Hierarchy, Size, Associativity, Partition
\n                                                            Interconnect Design – Impact on Cache Coherence
\n                                     7. Power Management
\n                                                            Hardware Power Management
\n                                                            Software Power Management
\n                                                            Operational Reliability – Hot-Spots, Power-Ground Noise<\/p>\n\n\n\n

Lecture Notes<\/strong><\/h2>\n\n\n\n

Will be added.<\/p>\n\n\n\n

Resources<\/strong><\/h2>\n\n\n\n

How to run SAM<\/a>     README<\/a><\/p>\n\n\n\n

Loading Codes onto SAM<\/a><\/p>\n\n\n\n

Generating Trace Files in SAM and Parsing Trace Files<\/a><\/p>\n\n\n\n

Instruction Trace File Parser<\/a><\/p>\n\n\n\n

CASPER – A Cycle-Accurate Heterogeneous ECMP Simulation Framework<\/p>\n\n\n\n

Lab Assignments<\/strong>  (Processor Designs will be evaluated on Simulator)                         <\/strong><\/h3>\n\n\n\n

                                          1. Compile Embedded Codes to Target Processor Instructions (Instruction Trace Files)<\/p>\n\n\n\n

                                          2. <\/strong>Study Memory Congestion in ECMPs – impact on Response Time and QoS –                                               using a Memory Macro-Simulator<\/p>\n\n\n\n

                                          3. <\/strong>Design Optimum On-Chip Memory for a Target Embedded Application<\/p>\n\n\n\n

                                          4.<\/strong> Use CASPER (Full-Chip Cycle-Accurate ECMP Simulator) to –
\n                                               vary Architectural Parameters and study Performance, Power, Energy and Area of the ECMP  under simulation<\/p>\n\n\n\n

                                          5. <\/strong>Study Hardware controlled Power Management in ECMPs using CASPER<\/p>\n\n\n\n

                                <\/strong>Course Project<\/strong>                               <\/strong><\/h3>\n\n\n\n

                                                      Design an ECMP for a specific Application Domain<\/p>\n\n\n\n

                                                      (Students have the option of picking applications in their research areas if available.
\n                                         Otherwise, the instructor will provide applications for the final project.)<\/p>\n","protected":false},"excerpt":{"rendered":"

Embedded Chip Multi-Processing ECGR 6090\/8090 – M01 Spring 2010 Lecture Timings          3:30pm – 4:45pm Monday, Wednesday       Room                           Woodward 140 Office Hours                 Wednesday 2:30 pm – 3:30 pm @ Woodward 235B Instructor                      Dr. Ari Mukherjee Course Objectives      Embedded systems are ubiquitous, and so … Continue reading →<\/span><\/a><\/p>\n","protected":false},"author":168,"featured_media":0,"parent":15,"menu_order":4,"comment_status":"closed","ping_status":"open","template":"","meta":{"footnotes":""},"class_list":["post-44","page","type-page","status-publish","hentry"],"jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/coefs.charlotte.edu\/amukherj\/wp-json\/wp\/v2\/pages\/44","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/coefs.charlotte.edu\/amukherj\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/coefs.charlotte.edu\/amukherj\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/coefs.charlotte.edu\/amukherj\/wp-json\/wp\/v2\/users\/168"}],"replies":[{"embeddable":true,"href":"https:\/\/coefs.charlotte.edu\/amukherj\/wp-json\/wp\/v2\/comments?post=44"}],"version-history":[{"count":5,"href":"https:\/\/coefs.charlotte.edu\/amukherj\/wp-json\/wp\/v2\/pages\/44\/revisions"}],"predecessor-version":[{"id":715,"href":"https:\/\/coefs.charlotte.edu\/amukherj\/wp-json\/wp\/v2\/pages\/44\/revisions\/715"}],"up":[{"embeddable":true,"href":"https:\/\/coefs.charlotte.edu\/amukherj\/wp-json\/wp\/v2\/pages\/15"}],"wp:attachment":[{"href":"https:\/\/coefs.charlotte.edu\/amukherj\/wp-json\/wp\/v2\/media?parent=44"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}